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IND16337 64-BIT AC-PDP DRIVER
The IND16337 is a high-voltage CMOS driver designed for flat display panels such as PDPs, VFDs and ELs. It consists of a 64-bit bi-directional shift register (16 bit 4 circuits), 64-bit latch and high-voltage CMOS driver. The logic block is designed to operate at 5-V power supply, enabling direct connection to a microcontroller. In addition, the IND16337 achieves low power dissipation by employing CMOS structure while having a high withstand voltage output (150 V, 40 mA MAX.) FEATURES
* * * * * * * * Built in four 16-bit bi-directional shift register circuits Data control with transfer clock (external) and latch High-speed data transfer (fmax. = 20 MHz MIN. at cascade connection) Wide operating temperature range (TA = -40 to +85oC) High withstand output voltage (150 V, 40 mA MAX.) 5-V CMOS input interface High withstand voltage CMOS structure Capable of reversing all driver outputs by PC pin
BLOCK DIAGRAM
PC BLK LE Sr1 I/O S1 S5
A1 CLK R/L B1
S1 S2 S3 S4
Note
L1
O1
I/O
S61
A2
Sr2 I/O S2 S6
B2
I/O
S62
A3
Sr3 I/O S3 S7
B3
I/O S63 Sr4
A4
I/O
S4 S8
S61 S62 S63 S64 O6
B4
I/O S64
Note High withstand voltage CMOS driver, 150 V, +40 mA (MAX.)
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
PIN CONFIGURATION (Top View)
O42 O41 O40 O39 O38 O37 O36 O35 O34 O33 O32 O31 O30 O29 O28 O27 O26 O25 O24 O23
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
NC Vdd2 NC Vss2 NC O43 O44 O45 O46 O47 O48 O49 O50 O51 O52 O53 O54 O55 O56 O57 O58 O59 O60 O61 O62 O63 O64 NC Vdd2 NC
1 3 4 5 6 7 8
80 79 78 77 76 75 74 73 72 71 70 69 68 67
9 10 11 12 13 14 15 16 17 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
100-pin plaxtic QFP
66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
NC Vdd2 NC Vss2 NC O43 O44 O45 O46 O47 O48 O49 O50 O51 O52 O53 O54 O55 O56 O57 O58 O59 O60 O61 O62 O63 O64 NC Vdd2 NC
Cautions 1. Pin 40 is connected to the lead frame, and therefore must be left open. 2. Ensure that the VDD1, VDD2, VSS1 and VSS2 pins are all used, and that VSS1 and VSS2 are used at the same potential. 3. To prevent latch up breakdown, the power should be turned on in the order VDD1, logic signal, VDD2. It should be turned off in the opposite order.
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
Vss2 NC CLK LE B4 B3 B2 B1 Vss1 NC R/L Vdd1 A1 A2 A3 A4 PC BLK NC Vss2
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IND16337
PIN DESCRIPTION
Symbol PC BLK LE A1 to A4 B1 to B4 CLK R/L Pin Name Polarity change input Blank input Latch enable input RIGHT data input/output LEFT data input/output Clock input Shift control input Pin Number 47 48 34 43 to 46 38 to 35 33 41 Description PC = L: All driver output invert BLK = H: All output = H or L Automatically executes latch by setting High at rising edgeof the clock When R/L = H, A1 to A4: Input B1 to B4: Output When R/L = L, A1 to A4: Output B1 to B4:Input
O1 to O64 High withstand voltage output VDD1 Power supply for logic block VDD2 Power supply for driver block VSS1 Logic GND VSS2 Driver GND NC Non-connection
Shift executed on fall Right shift mode when R/L = H SR1: A1 S1 *** S61 B1 (Same direction for SR2*SR4) Left shift mode when R/L = L SR1: B1 S61 *** S1 A1 (Same direction for SR2*SR4) 54 to 75, 81 to 130 V, 40 mA MAX. 100, 6 to 27 42 5 V +10% 2, 29, 52, 79 30 to 130 V Connect to system GND Connect to system GND Non-connection Ensure that pin 40 is left open.
39 4, 31, 50, 77 1, 3, 5, 28, 30, 32, 40, 49, 51, 53, 76, 78, 80
TRUTH TABLE 1 (Shift Register Block)
Input R/L H H L CLK H or L Output A Input Output B Output
Note 1
Shift Register
Right shift execution Hold Left shift execution
Note 2
Output Input
L H or L Output Hold Notes 1. The data of S57, S58, S59, S60 shifts to S61, S62, S63, S64 and is output from B1, B2, B3, B4 at the falling edge of the clock, respectively. 2. The data of S5, S6, S7, S8 shifts to S1, S2, S3, S4 and is output from A1, A2, A3, A4 at the falling edge of the clock, respectively.
TRUTH TABLE 2 (Latch Block)
LE H L CLK X Output State of Latch Block (Ln) Latch Sn data and hold output data Hold latch data Hold latch data
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
TRUTH TABLE 3 (Driver Block)
Ln BLK PC Output State of Driver Block X H H H (All driver outputs: H) X H L L (All driver outputs: L) X L H Output latch data (Ln) X L L Output reversed latch data (Ln) X: H or L, H: High level, L: Low level
TIMING CHART (Right shift)
CLK A1 (B4) A2 (B3) A3 (B2) A4 (B1) S1 (S64) S2 (S63) S3 (S62) S4 (S61) S5 (S60) S6 (S59) S7 (S58) S8 (S57) LE BLK PC O1 (O64) O2 (O63) O3 (O62) O4 (O61) O5 (O60) O6 (O59) O7 (O58) O8 (O57)
Remark Values in parentheses in the above chart are when R/L = L.
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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ABSOLUTE MAXIMUM RATINGS (TA = 25oC, VSS1 = VSS2 = 0 V)
Parameter Logic Block Supply Voltage Driver Block Supply Voltage Logic Block Input Voltage Driver Block Output Current Power Dissipation Operating Ambient Temperature Storage Temperature Symbol VDD1 VDD2 VI IO2 PD TA
o
IND16337
Ratings -0.5 to +7.0 -0.5 to +150 -0.5 to VDD1 + 0.5 40 1300Note -40 to +85
o
Unit V V V mA mW o C
o
Tstg
-65 to +150
C
Note Derate at -13 mW/ C at TA = 25 C or higher RECOMMENDED OPERATING CONDITIONS (TA = -40 to +85oC, VSS1 = VSS2 = 0 V)
Parameter Logic Block Supply Voltage Driver Block Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Output Current Symbol VDD1 VDD2 VIH VIL IOH2 IOL2 MIN. 4.5 30 0.8 VDD1 0 MAX. 5.5 130 VDD1 0.2 VDD1 -30 +30 Unit V V V V mA mA
ELECTRICAL SPECIFICATIONS (TA = 25oC, VDD1 = 5.0 V, VDD2 = 130 V, VSS1 = VSS2 = 0 V)
Parameter High-Level Output Voltage Low-Level Output Voltage High-Level Output Voltage Low-Level Output Voltage Input Leakage Current High-Level Input Voltage Low-Level Input Voltage Static Current Dissipation Symbol VOH1 VOL1 VOH21 VOH22 VOL21 VOL22 IIL VIH VIL IDD1 IDD1 IDD2 IDD2 Condition Logic, IOH1 = -1.0 mA Logic, IOL1 = 1.0 mA O1 to O64, IOH2 = -10 mA O1 to O64, IOH2 = -30 mA O1 to O64, IOL2 = 10 mA O1 to O64, IOL2 = 30 mA V1 = VDD1 or VSS1 Logic, TA = -40 to +85oC Logic, TA = 25oC Driver, TA = -40 to +85oC Driver, TA = 25oC MIN. 0.9 VDD1 0 123 110 MAX. VDD1 0.1 VDD1 5.0 15 +1.0 0.8 VDD1 0.2 VDD1 100 10 1000 100 Unit V V V V V V uA V V uA uA uA uA
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
SWITCHING CHARACTERISTICS (TA = 25oC, VDD1 = 5.0 V, VDD2 = 130 V, VSS1 = VSS2 = 0 V, logic CL = 15 pF, driver CL = 50 pF, tr = tf = 6.0 ns)
Parameter Transmission Delay Time Symbol tPHL1 tPLH1 tPHL2 tPLH2 tPHL3 tPLH3 tPHL4 tPLH4 tTLH tTHL fmax. Conditions CLKA/B CLK (LE = H) O1 to O64 BLK O1 to O64 PC O1 to O64 O1 to O64 O1 to O64 When data is read, duty 50% TA = -40 to +85oC VDD1 = 4.5 to 5.5 V When a cascade connection is made with a duty of 50% TA = -40 to +85oC VDD1 = 4.5 to 5.5 V MIN. MAX. 40 40 180 180 165 165 160 160 200 200 Unit ns ns ns ns ns ns ns ns ns ns MHz MHz
Rise Time Fall Time Maximum Clock Frequency
25 20
Input Capacitance
CI
15
pF
TIMMING REQUIREMENT (TA = -40 to +85oC, VDD1 = 4.5 to 5.5 V, VSS1 = VSS2 = 0 V, tr = tf = 6.0 ns)
Parameter Clock Pulse Width Latch Enable Pulse Width Blank Pulse Width PC Pulse Width Data Setup Time Data Hold Time Latch Enable Time 1 Latch Enable Time 2 Latch Enable Time 3 Latch Enable Time 4 Symbol PWCLK PWLE PWBLK PWPC tsetup thold tLE1 tLE2 tLE3 tLE4 Conditions MIN. 20 30 500 500 10 10 20 10 20 10 MAX. Unit ns ns ns ns ns ns ns ns ns ns
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
SWITCHING CHARACTERISTICS WAVEFORM
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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IND16337
100 PIN PLASTIC QFP (14 20) detail of lead end
NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition.
ITEM A B C D F G H I J K L M N P Q R S MILLIMETERS 23.20.2 20.00.2 14.00.2 17.20.2 0.8 0.6 0.300.10 0.15 0.65 (T.P.) 1.60.2 0.80.2 0.15+0.10 0.10 2.7 0.1250.075 5 o 5 o 3.0 MAX. INCHES 0.913+0.009 0.787+0.008 0.551+0.009 0.6770.008 0.031 0.024 0.012+0.005 0.006 0.026 (T.P.) 0.0630.008 0.031+0.008 0.006+0.004 0.004 0.106 0.0050.003 5o5 o 0.119 MAX.
Korzhenevsky 12, Minsk, 220064, Republic of Belarus Fax: +375 (17) 278 28 22 Tel: +375 (17) 278 49 09, 212 27 02 Tel/fax: +375 (17) 212 68 53 E-mail: office@bms.by URL: www.bms.by
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